![](https://s3images.coroflot.com/user_files/individual_files/613050_56fkg8ri52203ma3clpcb0hwb.jpg)
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The initial breadboard build.
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Powered with + 15 v - 15 v switching power supply. One cv input for LFO or ADSR Envelope modulation and one cv is being used in attempt to offset the initial voltage to 0 volts = off = silence.
The pin outs on the two little mini jacks were mis labeled by SparkFun, so it took a little probing around to discover that the node labeled "tip" was not actually where my signals were coming out of these jacks. After this hurdle was surpassed, I discovered two resistors that needed to be in serial, rather than in parallel, and then bingo, the circuit came up and met my expectations.
![](https://s3images.coroflot.com/user_files/individual_files/613050_qeaokpczpa8cirwoxw_efod0r.jpg)
Perfboard prototype. Power Header and IC sockets. I have added a 2nd 8 pin IC socket for the second op amp that I will be incorporating into the build to make the module a dual VCA.
![](https://s3images.coroflot.com/user_files/individual_files/613050_zsuz7vqbnyzq6mwzkrtjom85l.jpg)
Bottom view. Soldering it together. Things start off really tidy at first......
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Perfboard completed. Top View. Laying out the components correctly and soldering them in place without shorts or faults was a tremendous step forward for me. When first plugging in the board to my modular system, it didn't work. After tracing the signal path with an oscilloscope I was able to identify the fault and remedy a fix for it.
![](https://s3images.coroflot.com/user_files/individual_files/613050_uxrtzqifajshamfgwpxbiuyj_.jpg)
![](https://s3images.coroflot.com/user_files/individual_files/613050_a4v0fwqob3vhnmiqdqwaklttn.jpg)
Three jacks for Signal Input, Control Voltage, and Signal Output.
![](https://s3images.coroflot.com/user_files/individual_files/613050_gevmze0xmw8jhisxmvpfcsiaj.jpg)
![](https://s3images.coroflot.com/user_files/individual_files/613050_axip0qihjibk7ndnj_owrmis0.jpg)
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![](https://s3images.coroflot.com/user_files/individual_files/613050_j0ntfg33qygmotrpl6q8wzrdo.jpg)
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